Update to 20100811 release.
byuu says: 12-15% faster than v067.10, and my Atom never goes below 58fps for normal lo-res games at this point. Just a little more and I can leave Async on. That's pretty much it though for the low hanging fruit. Everything else will be a lot of work for a little gain. Speedups are from range testing across scanline boundaries and from using blargg's fast DSP core. Snes9X is now only 1.93x faster than bsnes, and bsnes is now faster than Super Sleuth. I also fixed the Circuit USA menus (HDMA timing adjustment), Wild Guns flickering (IRQ lock) and Jumpin' Derby (external IRQ triggering.) There's definitely a lot of troublesome games, mostly the same ones we had in the past (Koushien 2, Robocop vs The Terminator, etc.) I'm definitely going to debug Starfox, but I may not bother with some of the more obscure ones.
このコミットが含まれているのは:
Tim Allen
コミット
fa0f1c1e98
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|
@ -112,6 +112,7 @@ void CPU::reset() {
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|||
status.irq_transition = false;
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||||
status.irq_pending = false;
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||||
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status.irq_lock = false;
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||||
status.hdma_pending = false;
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||||
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||||
status.wram_addr = 0x000000;
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@ -34,11 +34,16 @@ private:
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void op_irq(uint16 vector);
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||||
//timing
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struct QueueEvent {
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enum : unsigned {
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DramRefresh,
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HdmaRun,
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};
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};
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nall::priority_queue<unsigned> queue;
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void queue_event(unsigned id);
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void last_cycle();
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void add_clocks(unsigned clocks);
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void add_time(unsigned clocks);
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void scanline();
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void run_auto_joypad_poll();
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@ -56,6 +61,7 @@ private:
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unsigned hdma_addr(unsigned i);
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unsigned hdma_iaddr(unsigned i);
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void dma_run();
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bool hdma_active_after(unsigned i);
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void hdma_update(unsigned i);
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void hdma_run();
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void hdma_init();
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@ -104,6 +110,7 @@ private:
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bool irq_transition;
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bool irq_pending;
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bool irq_lock;
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bool hdma_pending;
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unsigned wram_addr;
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@ -83,6 +83,15 @@ void CPU::dma_run() {
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dma_transfer(channel[i].direction, dma_bbus(i, index++), dma_addr(i));
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} while(channel[i].dma_enabled && --channel[i].transfer_size);
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}
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status.irq_lock = true;
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}
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bool CPU::hdma_active_after(unsigned i) {
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for(unsigned n = i + 1; i < 8; i++) {
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if(channel[i].hdma_enabled && !channel[i].hdma_completed) return true;
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}
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return false;
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}
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void CPU::hdma_update(unsigned i) {
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@ -93,10 +102,15 @@ void CPU::hdma_update(unsigned i) {
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add_clocks(8);
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if(channel[i].indirect) {
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channel[i].indirect_addr = dma_read(hdma_addr(i)) << 0;
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add_clocks(8);
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channel[i].indirect_addr |= dma_read(hdma_addr(i)) << 8;
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channel[i].indirect_addr = dma_read(hdma_addr(i)) << 8;
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add_clocks(8);
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//emulating this glitch causes a slight slowdown; only enable if needed
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//if(!channel[i].hdma_completed || hdma_active_after(i)) {
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channel[i].indirect_addr >>= 8;
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channel[i].indirect_addr |= dma_read(hdma_addr(i)) << 8;
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add_clocks(8);
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//}
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}
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}
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}
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@ -108,7 +122,7 @@ void CPU::hdma_run() {
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}
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if(channels == 0) return;
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add_clocks(16);
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add_clocks(24);
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for(unsigned i = 0; i < 8; i++) {
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if(channel[i].hdma_enabled == false || channel[i].hdma_completed == true) continue;
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channel[i].dma_enabled = false;
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@ -130,6 +144,8 @@ void CPU::hdma_run() {
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channel[i].hdma_do_transfer = channel[i].line_counter & 0x80;
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hdma_update(i);
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}
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status.irq_lock = true;
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}
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void CPU::hdma_init() {
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@ -150,6 +166,8 @@ void CPU::hdma_init() {
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channel[i].line_counter = 0;
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hdma_update(i);
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}
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status.irq_lock = true;
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}
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void CPU::dma_reset() {
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@ -1,12 +1,5 @@
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#ifdef CPU_CPP
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struct QueueEvent {
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enum : unsigned {
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DramRefresh,
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HdmaRun,
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};
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};
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void CPU::queue_event(unsigned id) {
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switch(id) {
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case QueueEvent::DramRefresh: return add_clocks(40);
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@ -15,13 +8,18 @@ void CPU::queue_event(unsigned id) {
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}
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void CPU::last_cycle() {
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if(status.irq_lock) {
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status.irq_lock = false;
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return;
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}
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|
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if(status.nmi_transition) {
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regs.wai = false;
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status.nmi_transition = false;
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status.nmi_pending = true;
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}
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if(status.irq_transition) {
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if(status.irq_transition || regs.irq) {
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regs.wai = false;
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status.irq_transition = false;
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status.irq_pending = !regs.p.i;
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@ -29,40 +27,32 @@ void CPU::last_cycle() {
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}
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||||
void CPU::add_clocks(unsigned clocks) {
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step(clocks);
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queue.tick(clocks);
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unsigned clocksleft = lineclocks() - hcounter();
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if(clocks > clocksleft) {
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add_time(clocksleft);
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add_time(clocks - clocksleft);
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} else {
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add_time(clocks);
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}
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}
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void CPU::add_time(unsigned clocks) {
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if(status.irq_line && (status.virq_enabled || status.hirq_enabled)) {
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status.irq_transition = true;
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}
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if(status.virq_enabled && !status.hirq_enabled) {
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if(status.hirq_enabled) {
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if(status.virq_enabled) {
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unsigned cpu_time = vcounter() * 1364 + hcounter();
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unsigned irq_time = status.vtime * 1364 + status.htime * 4;
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if(cpu_time > irq_time) irq_time += 262 * 1364;
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bool irq_valid = status.irq_valid;
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status.irq_valid = cpu_time <= irq_time && cpu_time + clocks > irq_time;
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if(!irq_valid && status.irq_valid) status.irq_line = true;
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} else {
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unsigned irq_time = status.htime * 4;
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if(hcounter() > irq_time) irq_time += 1364;
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bool irq_valid = status.irq_valid;
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status.irq_valid = hcounter() <= irq_time && hcounter() + clocks > irq_time;
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if(!irq_valid && status.irq_valid) status.irq_line = true;
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}
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if(status.irq_line) status.irq_transition = true;
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} else if(status.virq_enabled) {
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bool irq_valid = status.irq_valid;
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status.irq_valid = vcounter() == status.vtime;
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if(!irq_valid && status.irq_valid) {
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status.irq_line = true;
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status.irq_transition = true;
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}
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} else if(status.hirq_enabled) {
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bool irq_valid = status.irq_valid;
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status.irq_valid = hcounter() <= status.htime * 4 && hcounter() + clocks > status.htime * 4;
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if(status.virq_enabled && vcounter() != status.vtime) status.irq_valid = false;
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if(!irq_valid && status.irq_valid) {
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status.irq_line = true;
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status.irq_transition = true;
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}
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if(!irq_valid && status.irq_valid) status.irq_line = true;
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if(status.irq_line) status.irq_transition = true;
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}
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tick(clocks);
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queue.tick(clocks);
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step(clocks);
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}
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void CPU::scanline() {
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@ -1,7 +1,7 @@
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namespace SNES {
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namespace Info {
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static const char Name[] = "bsnes";
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static const char Version[] = "067.10";
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static const char Version[] = "067.11";
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static const unsigned SerializerVersion = 12;
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}
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}
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ファイル差分が大きすぎるため省略します
差分を読み込み
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@ -1,4 +1,4 @@
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// Highly accurate SNES SPC-700 DSP emulator
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// Fast SNES SPC-700 DSP emulator (about 3x speed of accurate one)
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// snes_spc 0.9.5
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#ifndef BLARGG_SPC_DSP_H
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@ -8,16 +8,18 @@
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BLARGG_NAMESPACE_BEGIN
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extern "C" { typedef void (*dsp_copy_func_t)( unsigned char** io, void* state, size_t ); }
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struct Spc_Dsp {
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public:
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typedef BOOST::uint8_t byte;
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// Setup
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// Initializes DSP and has it use the 64K RAM provided
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void init( void* ram_64k );
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// Sets function that is called when output buffer is filled, or NULL for none
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blargg_callback<void (*)( void* user_data )> set_output_callback;
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//void set_output_callback( void (*func)( void* user_data ), void* user_data );
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// Sets destination for output samples. If begin is NULL, doesn't generate any.
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typedef short sample_t;
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@ -26,52 +28,42 @@ public:
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// Current position in output buffer, or NULL if no buffer set
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sample_t* output_ptr() const;
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// Sets function that is called when output buffer is filled, or NULL for none
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blargg_callback<void (*)( void* user_data )> set_output_callback;
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//void set_output_callback( void (*func)( void* user_data ), void* user_data );
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// Emulation
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// Number of samples written to output buffer since last set, or 0 if no buffer set.
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int sample_count() const;
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// Emulation
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// Resets DSP to power-on state
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void reset();
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// Emulates pressing reset switch on SNES
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void soft_reset();
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// Reads/writes DSP registers. For accuracy, you must first call run()
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// Reads/writes DSP registers. For accuracy, you must first call spc_run_dsp()
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// to catch the DSP up to present.
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int read ( int addr ) const;
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void write( int addr, int data );
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// Runs DSP for specified number of clocks (~1024000 per second). Every 32 clocks
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// a pair of samples is be generated.
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// a pair of samples is generated.
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void run( int clock_count );
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|
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// Sound control
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|
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// Using these reduces emulation accuracy.
|
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// Mutes voices corresponding to non-zero bits in mask (issues repeated KOFF events).
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// Mutes voices corresponding to non-zero bits in mask (overrides VxVOL with 0).
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// Reduces emulation accuracy.
|
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enum { voice_count = 8 };
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void mute_voices( int mask ) { mute_mask = mask; }
|
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void mute_voices( int mask ) { mute_mask = mask; }
|
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|
||||
// If true, prevents channels and global volumes from being phase-negated
|
||||
void disable_surround( bool disable = true );
|
||||
|
||||
|
||||
// State
|
||||
|
||||
// Resets DSP and uses supplied values to initialize registers
|
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enum { register_count = 128 };
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||||
void load( byte const regs [register_count] );
|
||||
|
||||
// Saves/loads exact emulator state
|
||||
enum { state_size = 640 }; // maximum space needed when saving
|
||||
typedef dsp_copy_func_t copy_func_t;
|
||||
void copy_state( unsigned char** io, copy_func_t );
|
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|
||||
// Returns non-zero if new key-on events occurred since last call
|
||||
bool check_kon();
|
||||
|
||||
// DSP register addresses
|
||||
|
||||
// Global registers
|
||||
|
|
@ -109,21 +101,17 @@ public:
|
|||
struct voice_t
|
||||
{
|
||||
int buf [brr_buf_size*2];// decoded samples (twice the size to simplify wrap handling)
|
||||
int buf_pos; // place in buffer where next samples will be decoded
|
||||
int* buf_pos; // place in buffer where next samples will be decoded
|
||||
int interp_pos; // relative fractional position in sample (0x1000 = 1.0)
|
||||
int brr_addr; // address of current BRR block
|
||||
int brr_offset; // current decoding offset in BRR block
|
||||
byte* regs; // pointer to voice's DSP registers
|
||||
int vbit; // bitmask for voice: 0x01 for voice 0, 0x02 for voice 1, etc.
|
||||
int kon_delay; // KON delay/current setup phase
|
||||
env_mode_t env_mode;
|
||||
int env; // current envelope level
|
||||
int hidden_env; // used by GAIN mode 7, very obscure quirk
|
||||
byte t_envx_out;
|
||||
int volume [2]; // copy of volume from DSP registers, with surround disabled
|
||||
};
|
||||
private:
|
||||
enum { brr_block_size = 9 };
|
||||
|
||||
// non-emulation state
|
||||
byte* ram; // 64K shared RAM between DSP and SMP
|
||||
int mute_mask;
|
||||
|
|
@ -133,145 +121,81 @@ private:
|
|||
sample_t* output_end;
|
||||
sample_t* user_output_end;
|
||||
sample_t dummy_buf [2];
|
||||
bool kon_check; // set when a new KON occurs
|
||||
|
||||
struct state_t
|
||||
{
|
||||
int every_other_sample; // toggles every sample
|
||||
int kon; // KON value when last checked
|
||||
int noise;
|
||||
int counter;
|
||||
int echo_offset; // offset from ESA in echo buffer
|
||||
int echo_length; // number of bytes that echo_offset will stop at
|
||||
int phase; // next clock cycle to run (0-31)
|
||||
unsigned counters [4];
|
||||
|
||||
// Hidden registers also written to when main register is written to
|
||||
int new_kon;
|
||||
byte endx_buf;
|
||||
byte envx_buf;
|
||||
byte outx_buf;
|
||||
|
||||
// Temporary state between clocks
|
||||
|
||||
// read once per sample
|
||||
int t_pmon;
|
||||
int t_non;
|
||||
int t_eon;
|
||||
int t_dir;
|
||||
int new_kon;
|
||||
int t_koff;
|
||||
|
||||
// read a few clocks ahead then used
|
||||
int t_brr_next_addr;
|
||||
int t_adsr0;
|
||||
int t_brr_header;
|
||||
int t_brr_byte;
|
||||
int t_srcn;
|
||||
int t_esa;
|
||||
int t_echo_enabled;
|
||||
|
||||
// internal state that is recalculated every sample
|
||||
int t_dir_addr;
|
||||
int t_pitch;
|
||||
int t_output;
|
||||
int t_looped;
|
||||
int t_echo_ptr;
|
||||
|
||||
// left/right sums
|
||||
int t_main_out [2];
|
||||
int t_echo_out [2];
|
||||
int t_echo_in [2];
|
||||
|
||||
voice_t voices [voice_count];
|
||||
|
||||
// Echo history keeps most recent 8 samples (twice the size to simplify wrap handling)
|
||||
int (*echo_hist_pos) [2]; // &echo_hist [0 to 7]
|
||||
int echo_hist [echo_hist_size * 2] [2];
|
||||
|
||||
unsigned* counter_select [32];
|
||||
voice_t voices [voice_count];
|
||||
};
|
||||
state_t m;
|
||||
|
||||
byte regs [register_count];
|
||||
|
||||
void init_counter();
|
||||
void run_counters();
|
||||
unsigned read_counter( int rate );
|
||||
|
||||
int interpolate( voice_t const* v );
|
||||
void run_envelope( voice_t* const v );
|
||||
void decode_brr( voice_t* v );
|
||||
|
||||
void misc_27();
|
||||
void misc_28();
|
||||
void misc_29();
|
||||
void misc_30();
|
||||
|
||||
void voice_output( voice_t const* v, int ch );
|
||||
void voice_V1( voice_t* const );
|
||||
void voice_V2( voice_t* const );
|
||||
void voice_V3( voice_t* const );
|
||||
void voice_V3a( voice_t* const );
|
||||
void voice_V3b( voice_t* const );
|
||||
void voice_V3c( voice_t* const );
|
||||
void voice_V4( voice_t* const );
|
||||
void voice_V5( voice_t* const );
|
||||
void voice_V6( voice_t* const );
|
||||
void voice_V7( voice_t* const );
|
||||
void voice_V8( voice_t* const );
|
||||
void voice_V9( voice_t* const );
|
||||
void voice_V7_V4_V1( voice_t* const );
|
||||
void voice_V8_V5_V2( voice_t* const );
|
||||
void voice_V9_V6_V3( voice_t* const );
|
||||
|
||||
void echo_read( int ch );
|
||||
int echo_output( int ch );
|
||||
void echo_write( int ch );
|
||||
void echo_22();
|
||||
void echo_23();
|
||||
void echo_24();
|
||||
void echo_25();
|
||||
void echo_26();
|
||||
void echo_27();
|
||||
void echo_28();
|
||||
void echo_29();
|
||||
void echo_30();
|
||||
|
||||
void run_counter( int );
|
||||
void update_voice_vol( int addr );
|
||||
void set_null_output();
|
||||
void write_sample( int l, int r );
|
||||
void apply_output_enables();
|
||||
};
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
inline int Spc_Dsp::read( int addr ) const
|
||||
{
|
||||
assert( (unsigned) addr < register_count );
|
||||
|
||||
return regs [addr];
|
||||
}
|
||||
|
||||
inline void Spc_Dsp::update_voice_vol( int addr )
|
||||
{
|
||||
int l = (int8_t) regs [addr + v_voll];
|
||||
int r = (int8_t) regs [addr + v_volr];
|
||||
|
||||
if ( l * r < surround_threshold )
|
||||
{
|
||||
// signs differ, so negate those that are negative
|
||||
l ^= l >> 7;
|
||||
r ^= r >> 7;
|
||||
}
|
||||
|
||||
int index = addr >> 4;
|
||||
voice_t& v = m.voices [index];
|
||||
int enabled = ~mute_mask >> index & 1;
|
||||
v.volume [0] = l * enabled;
|
||||
v.volume [1] = r * enabled;
|
||||
}
|
||||
|
||||
inline void Spc_Dsp::write( int addr, int data )
|
||||
{
|
||||
assert( (unsigned) addr < register_count );
|
||||
|
||||
regs [addr] = (byte) data;
|
||||
switch ( addr & 0x0F )
|
||||
int low = addr & 0x0F;
|
||||
if ( low < 0x2 ) // voice volumes
|
||||
{
|
||||
update_voice_vol( low ^ addr /* addr & 0xF0 */ );
|
||||
}
|
||||
else if ( low == 0xC )
|
||||
{
|
||||
case v_envx:
|
||||
m.envx_buf = (byte) data;
|
||||
break;
|
||||
|
||||
case v_outx:
|
||||
m.outx_buf = (byte) data;
|
||||
break;
|
||||
|
||||
case 0x0C:
|
||||
if ( addr == r_kon )
|
||||
m.new_kon = (byte) data;
|
||||
|
||||
if ( addr == r_endx ) // always cleared, regardless of data written
|
||||
{
|
||||
m.endx_buf = 0;
|
||||
regs [r_endx] = 0;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -280,40 +204,22 @@ inline void Spc_Dsp::disable_surround( bool disable )
|
|||
surround_threshold = disable ? 0 : -0x4000;
|
||||
}
|
||||
|
||||
inline bool Spc_Dsp::check_kon()
|
||||
{
|
||||
bool old = kon_check;
|
||||
kon_check = 0;
|
||||
return old;
|
||||
}
|
||||
|
||||
inline Spc_Dsp::sample_t* Spc_Dsp::output_ptr() const
|
||||
{
|
||||
// Don't return pointer into dummy_buf
|
||||
return (output_ptr_ != dummy_buf ? output_ptr_ : user_output_end);
|
||||
}
|
||||
|
||||
class SPC_State_Copier {
|
||||
Spc_Dsp::copy_func_t func;
|
||||
unsigned char** buf;
|
||||
public:
|
||||
SPC_State_Copier( unsigned char** p, Spc_Dsp::copy_func_t f ) { func = f; buf = p; }
|
||||
void copy( void* state, size_t size );
|
||||
int copy_int( int state, int size );
|
||||
void skip( int count );
|
||||
|
||||
// Reads uint8_t and then skips that many bytes. If writing, writes
|
||||
// uint8_t of 0. This allows future expansion at this point, by writing
|
||||
// non-zero and additional data.
|
||||
void extra();
|
||||
};
|
||||
|
||||
#define SPC_COPY( type, state )\
|
||||
{\
|
||||
state = (BOOST::type) copier.copy_int( state, sizeof (BOOST::type) );\
|
||||
check( (BOOST::type) state == state );\
|
||||
inline int Spc_Dsp::sample_count() const
|
||||
{
|
||||
sample_t* p = output_ptr();
|
||||
return (p ? p - output_begin : 0);
|
||||
}
|
||||
|
||||
#define SPC_NO_COPY_STATE_FUNCS 1
|
||||
|
||||
#define SPC_LESS_ACCURATE 1
|
||||
|
||||
BLARGG_NAMESPACE_END
|
||||
|
||||
#endif
|
||||
|
|
|
|||
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